A Hierarchical Associative Processing System


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How Powerful We Are. Macca's Makeover. Australian Pocket Oxford Dictionary. Rowling David Walliams. Fiction Non Fiction. Home Gardening International Subscriptions. Health Fitness International Subscriptions. Kids Girls. Would you like to rate and review this book? The Hebbian rule [ ] is known as the outer product rule of storage in connection with associative Ke-Lin Du, M. Swamy, Willshaw [1] introduced the NHAM and derived an asymptotic upper bound on the number associations I68 3. Marshall C. Yovits, Memory Management In the preceding chapter we have described the implementation of the intermediate language primitives on both levels of the associative storage hierarchy.

However, some questions were left open in this description, Heinrich J. Associative Storage Hardware Associative Storage is a storage device or process that the storage locations are identified by their contents, or by a part of their contents, NSManagedObject uses the Associative Storage pattern, which allows you to add relationships and per-instance information called attributes Associative storage [online]. English words that begin with a. English words that begin with as. English words that begin with ass. Load a random word.

Binary CAMs, for example, only support exact matching.

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First, a network administrator creates one or more access control lists in a conventional manner. For example, the administrator preferably utilizes a conventional text editor at a management station not shown to create the access control lists. Each access control list, such as ACL a , is given a name, such as ACL , and is preferably arranged in a table array having multiple rows and columns.

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The columns of the ACL represent the specific criteria with which network messages are compared. ACL a further includes an action column that corresponds to the particular action that is to be applied to network messages matching a corresponding ACE statement. Exemplary actions include permit, deny, permit and log, and deny and log, although other actions may be specified. For example, a possible action may be to execute a particular program stored in the non-volatile or dynamic memories of the respective device.

The text-based ACLs that are to be utilized at a given intermediate device are then downloaded to that device in a conventional manner and stored, preferably in non-volatile memory. Next, the network administrator preferably assigns one or more ACLs a - e to each interface a - e per direction e. For example, the network administrator may assign ACL a ACL to interface a for purposes of input security control. Accordingly, upon receipt of a network message at interface a , it is compared with ACE statements - of ACL a.

Once a match is located, the corresponding action is returned and the processing stops. That is, no additional ACEs are examined. The mask specifies which bits are significant and which are don't cares. The total number of bits, namely , far exceeds the width of most commercially available TCAMs. As indicated above, the IP source and destination address fields are the longest fields of the flow label. In the illustrative embodiment, it is these fields that are selected for programming into the top-level TCAM , while the remaining fields are programmed into the next level TCAM In other words, ACEs with large numbers of don't cares should generally be placed into lower entries of the TCAMs , , so that more specific entries may be matched first.

Specifically, assuming the addresses have a bit range of from left to right, a first sub-field corresponds to the bit range , since all six source addresses have either a specific value across this entire range or all don't cares across the entire range. A second sub-field corresponds to the bit range of A third sub-field corresponds to the bit range A fourth sub-field corresponds to the bit range For each of the addresses, the values within each sub-field are either all specific values or all don't care values i. As indicated at block , the next step is to determine the number of distinct values, K, that each coordinate sub-field may have.

The first sub-field, for example, has the following five distinct values:. The second sub-field has one distinct value and an other value. The third sub-field has four distinct values and an other value. The fourth sub-field has two distinct values and an other value. After determining the number of distinct values, K, the next step is to compute the minimum number of bits needed to represent each distinct value, K, for each coordinate subfield, as indicated at block This may be accomplished by using the following algorithm:.

Applying this algorithm, we find that the minimum number of bits needed to represent the five distinct and other values of the first sub-field is three. The number of bits needed to represent the second sub-field is one. The number of bits needed for both the third and the fourth sub-fields is two. Considering the first sub-field, for example, there are five distinct values as well as an other value, and these values are to be represented with three bits. The distinct and other values of the remaining sub-fields may be assigned to the following unique coordinate values:.

Continuing with the above example, the first, second, third and fourth sub-fields are represented by 5, 2, 4 and 3 UCVs, respectively. The UCVSs are then ordered from smallest e.

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As indicated at block , steps - are then preferably repeated for the IP destination addresses of ACL a. Each row of TCAM preferably includes an additional bit or cell that is used to indicate whether the UCVS associated with that row is a source or destination address. For example, if this cell is asserted, then the UCVS is associated with a source address. If the cell is de-asserted, then the UCVS is associated with a destination address.

As shown, each of the bit IPv6 source and destination addresses of the ACL a has been reduced to just 8 bits.

The next level TCAM is then loaded with the criteria fields i. The hierarchical memory structure is now fully programmed as indicated by end block , and may be utilized by device to evaluate messages. For example, suppose that device receives a network message on interface a that originated from the Internet cloud The message is passed to the forwarding entity which provides it to the ACL storage and searching device At the ACL storage and searching device , the pre-parser extracts the relevant fields for generating a flow label and temporarily stores this flow label in the message buffer The buffer control logic then directs the message buffer to input the IP source and destination addresses from the flow label into the top-level TCAM either simultaneously or sequentially via arrow If the top-level TCAM detects a match to the input address, a corresponding record in the first RAM is specified, as shown by arrow As discussed above, this record contains the UCVS derived for the matching address.

Furthermore, although the input address may have been bits long, the corresponding UCVS is far shorter i. Buffer control logic also directs the message buffer to input the remaining fields from the flow label e. Since the IP source and destination addresses have been effectively translated into their much shorter UCVSs, all of this data is now able to fit within the width of the next-level TCAM If the next-level TCAM detects a match to the flow label, a corresponding record in the second RAM is specified, as shown by arrow As discussed above, this record contains the action for the message.

This action is then passed by the second RAM to the forwarding entity which carries out the specified action e. To improve performance, the hierarchical memory structure may be utilized to examine two or more messages substantially simultaneously. More specifically, at the same time that the UCVSs and remaining fields corresponding to the flow label of a first message are being used to search the next level TCAM , the IP addresses from the flow label of a second message may be input into the top-level TCAM in order to identify their corresponding UCVSs.

In this embodiment, there may be multiple message buffers, buffer controls and pre-parser logic circuits. In a preferred embodiment, UCV sequences on the order of 32 bits in length are derived and utilized within ACL storage and searching device in the manner described above. For example, these functions may be performed at a management station and the results remotely programmed into the ACL storage and searching device In this case, there would be no need for the device to include an ACL translation engine Depending on the length of the data string being searched, moreover, the hierarchical associative memory may contain additional TCAM levels.

At each level except for the last and final level , one or more fields of the data string are converted to their corresponding UCVSs for inputting into the next lower TCAM. As a result, the hierarchical associative memory of the present invention may be able to search data strings that are far longer than the individual TCAMs are wide. It should also be understood that the output of the top-level or any other TCAM may be processed e.

Similarly, one or more fields of the data string may be pre-processed generating a derived value which is then input to the top-level or any other TCAM. Thus, the inputs to a TCAM level may consist of any combination of: the output of a higher level TCAM, the processed output of a higher level TCAM, one or more fields of the data string, and one or more values derived from one or more fields of the data string. The foregoing description has been directed to specific embodiments of this invention. It will be apparent, however, that other variations and modifications may be made to the described embodiments, with the attainment of some or all of their advantages.

For example, the techniques of the present invention may be applied to searching other long data strings such as URLs or other data records or files within an associative memory structure.

A Hierarchical Associative Processing System : Heinrich J. Stüttgen :

Therefore, it is an object of the appended claims to cover all such variations and modifications as come within the true spirit and scope of the invention. Year of fee payment : 4.


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A system and method for efficiently searching long strings of data, such as network messages, is described. The system preferably includes an associative memory structure, having a plurality of content addressable memories CAMs. Preferably, a top-level CAM receives only a selected portion of the data string or network message as its input. The output of the top-level CAM is then joined with some or all of the remaining portions of the data string to form a new output that is provided to the CAM at the next lower level. The top-level CAM is programmed such that its output is substantially smaller e.

The system can thus search data strings that are on the whole far longer than the widths of the respective CAMs forming the memory structure. Field of the Invention The present invention relates generally to computer networks, and more specifically, to a method and apparatus for configuring an associative memory device to efficiently perform matches against long input strings, such as network messages.

Background Information A computer network typically comprises a plurality of interconnected entities that transmit i.

A Hierarchical Associative Processing System A Hierarchical Associative Processing System
A Hierarchical Associative Processing System A Hierarchical Associative Processing System
A Hierarchical Associative Processing System A Hierarchical Associative Processing System
A Hierarchical Associative Processing System A Hierarchical Associative Processing System
A Hierarchical Associative Processing System A Hierarchical Associative Processing System
A Hierarchical Associative Processing System A Hierarchical Associative Processing System
A Hierarchical Associative Processing System A Hierarchical Associative Processing System
A Hierarchical Associative Processing System A Hierarchical Associative Processing System
A Hierarchical Associative Processing System

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